Many types of memory devices exist, including read-only memory (ROM), erasable programmable read-only memory (EPROM), flash EPROM, electrically erasable programmable read-only memory (EEPROM), flash EEPROM, static random access memory (SRAM), and dynamic random access memory (DRAM). Occasionally, one or more bits in a memory device may become non-programmable or non-erasable, resulting in one or more bit failures in the memory device. When a bit failure occurs in a memory device, the memory device is typically discarded. If memory devices could be used despite bit failures, then the wasteful discarding of memory devices could be avoided, thereby reducing costs and increasing efficiency of processes incorporating memory devices.
In typical 256 kilobyte through 1 megabyte memory device arrays, approximately two to ten bit failures may sometimes exist, usually resulting from processing defects in manufacturing the memory devices. For example, particulate matter may electrically couple two or more lines which are designed to be isolated. Such electrical coupling may also result from lithographic defects such as improper semiconductor masks or semiconductor masks that are improperly aligned. Also, excessive leakage in a floating gate may cause a bit failure.
To be cost effective, a solution to this problem preferably requires minimum surface area and logic overhead in the memory device. Consequently, a need has arisen for a method and circuitry for masking data in a memory device, which masks bit failures while requiring minimum surface area and logic overhead in the memory device.